Webinar on FPGA implementation of an LTE receiver design

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MathWorks
 
Dear Somashekara Bhat,
 
Adding LTE connectivity to a device requires implementing the system-level algorithms in FPGA or ASIC hardware while maintaining compliance with the standards.

In this webinar you will learn the process from designing an LTE receiver to implementing it on an FPGA.
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Webinar: FPGA implementation of an LTE receiver design
3:00 pm -3:40 pm (IST), 25 October 2016
Register 
This webinar will show how to:
 • Develop an LTE receiver algorithm with a standard-compliant model of the LTE physical layer
 • Simulate the receiver using real-world signal recordings
 • Design and verify a fixed-point hardware architecture for the receiver using the system-level algorithm as a golden reference
 • Optimize the hardware architecture for speed and area and generate HDL code that can be targeted to a software-defined radio (SDR) to decode LTE waveforms off-the-air
Sunita John
Marketing Programs
+91 80 6632 6029
sunita.john@mathworks.in

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